Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/icip/RhuP09a
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Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding.
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Memory-less bit-plane coder architecture for JPEG2000 with concurrent column-stripe coding.
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