AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/icm2/IsmaelHA23
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AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification.
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AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification.
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