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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icmssp/XuSCZ17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hui_Xu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suzhi_Cao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xue_Sun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yueying_Zhan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3145511.3145520>
foaf:homepage <https://doi.org/10.1145/3145511.3145520>
dc:identifier DBLP conf/icmssp/XuSCZ17 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3145511.3145520 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Implementation of Multi-Priority Variable-Length iSLIP Algorithm Based on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hui_Xu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suzhi_Cao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xue_Sun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yueying_Zhan>
swrc:pages 26-30 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icmssp/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icmssp/XuSCZ17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icmssp/XuSCZ17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icmssp/icmssp2017.html#XuSCZ17>
rdfs:seeAlso <https://doi.org/10.1145/3145511.3145520>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icmssp>
dc:title Implementation of Multi-Priority Variable-Length iSLIP Algorithm Based on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document