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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iconip/SahinBY06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suhap_Sahin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suleyman_Yazici>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasar_Becerikli>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F11893295%5F122>
foaf:homepage <https://doi.org/10.1007/11893295_122>
dc:identifier DBLP conf/iconip/SahinBY06 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F11893295%5F122 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Neural Network Implementation in Hardware Using FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suhap_Sahin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suleyman_Yazici>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasar_Becerikli>
swrc:pages 1105-1112 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iconip/2006-3>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iconip/SahinBY06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iconip/SahinBY06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iconip/iconip2006-3.html#SahinBY06>
rdfs:seeAlso <https://doi.org/10.1007/11893295_122>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iconip>
dc:title Neural Network Implementation in Hardware Using FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document