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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iconip/TovarFAHA07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eric_Shun_Fukuda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gessyca_Maria_Tovar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Asai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Hirose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshihito_Amemiya>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-69162-4%5F13>
foaf:homepage <https://doi.org/10.1007/978-3-540-69162-4_13>
dc:identifier DBLP conf/iconip/TovarFAHA07 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-69162-4%5F13 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eric_Shun_Fukuda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gessyca_Maria_Tovar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Asai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsuya_Hirose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshihito_Amemiya>
swrc:pages 117-126 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iconip/2007-2>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iconip/TovarFAHA07/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iconip/iconip2007-2.html#TovarFAHA07>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-69162-4_13>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iconip>
dc:title Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document