Allowing cycle-stealing direct memory access I/O concurrent with hard-real-time programs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/icpads/HuangLC96
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Allowing cycle-stealing direct memory access I/O concurrent with hard-real-time programs.
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file organisation; real-time systems; fault tolerant computing; cycle-stealing direct memory access; I/O concurrent; hard-real-time programs; schedulability analysis; worst-case execution time; bus cycles; straight-line sequence; cycle-stealing operations
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Allowing cycle-stealing direct memory access I/O concurrent with hard-real-time programs.
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