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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ics/MaratheMS05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bronis_R._de_Supinski>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_Mueller_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jaydeep_Marathe>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1088149.1088153>
foaf:homepage <https://doi.org/10.1145/1088149.1088153>
dc:identifier DBLP conf/ics/MaratheMS05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1088149.1088153 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bronis_R._de_Supinski>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_Mueller_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jaydeep_Marathe>
swrc:pages 21-30 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ics/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ics/MaratheMS05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ics/MaratheMS05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ics/ics2005.html#MaratheMS05>
rdfs:seeAlso <https://doi.org/10.1145/1088149.1088153>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ics>
dc:subject SMPs, cache analysis, coherence protocols, dynamic binary rewriting, hardware performance monitoring, program instrumentation (xsd:string)
dc:title A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document