A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ics/MaratheMS05
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2005
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A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks.
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SMPs, cache analysis, coherence protocols, dynamic binary rewriting, hardware performance monitoring, program instrumentation
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A hybrid hardware/software approach to efficiently determine cache coherence Bottlenecks.
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