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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ics/SterlingB99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Larry_A._Bergman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thomas_L._Sterling>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F305138.305205>
foaf:homepage <https://doi.org/10.1145/305138.305205>
dc:identifier DBLP conf/ics/SterlingB99 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F305138.305205 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label A design analysis of a hybrid technology multithreaded architecture for petaflops scale computation3. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Larry_A._Bergman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thomas_L._Sterling>
swrc:pages 286-293 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ics/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ics/SterlingB99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ics/SterlingB99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ics/ics1999.html#SterlingB99>
rdfs:seeAlso <https://doi.org/10.1145/305138.305205>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ics>
dc:title A design analysis of a hybrid technology multithreaded architecture for petaflops scale computation3. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document