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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/icsent/ChebakiDBF18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Elasaad_Chebaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fay%E2%88%9A%C3%9Fal_Djeffal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hichem_Ferhati>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toufik_Bentrcia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3330089.3330471>
foaf:homepage <https://doi.org/10.1145/3330089.3330471>
dc:identifier DBLP conf/icsent/ChebakiDBF18 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3330089.3330471 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Device and Circuit Level Performance Analysis of a New Nanoscale DGJL MOSFET Design Using an Accurate Numerical Computation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Elasaad_Chebaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fay%E2%88%9A%C3%9Fal_Djeffal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hichem_Ferhati>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toufik_Bentrcia>
swrc:pages 36:1-36:5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/icsent/2018>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/icsent/ChebakiDBF18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/icsent/ChebakiDBF18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/icsent/icsent2018.html#ChebakiDBF18>
rdfs:seeAlso <https://doi.org/10.1145/3330089.3330471>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/icsent>
dc:title Device and Circuit Level Performance Analysis of a New Nanoscale DGJL MOSFET Design Using an Accurate Numerical Computation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document