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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ifip10-3/RagelAPP10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jorgen_Peddersen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jude_Angelo_Ambrose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roshan_G._Ragel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-15234-4%5F14>
foaf:homepage <https://doi.org/10.1007/978-3-642-15234-4_14>
dc:identifier DBLP conf/ifip10-3/RagelAPP10 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-642-15234-4%5F14 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label RACE: A Rapid, ArChitectural Simulation and Synthesis Framework for Embedded Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jorgen_Peddersen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jude_Angelo_Ambrose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roshan_G._Ragel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
swrc:pages 137-144 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ifip10-3/2010dipes>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ifip10-3/RagelAPP10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ifip10-3/RagelAPP10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ifip10-3/dipes2010.html#RagelAPP10>
rdfs:seeAlso <https://doi.org/10.1007/978-3-642-15234-4_14>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ifip10-3>
dc:title RACE: A Rapid, ArChitectural Simulation and Synthesis Framework for Embedded Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document