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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ijcnn/Neville06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Richard_Neville>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIJCNN.2006.247213>
foaf:homepage <https://doi.org/10.1109/IJCNN.2006.247213>
dc:identifier DBLP conf/ijcnn/Neville06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIJCNN.2006.247213 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label A hardware implementation of Multi-level Threshold Logic for Artificial Neural Net. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Richard_Neville>
swrc:pages 2845-2851 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ijcnn/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ijcnn/Neville06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ijcnn/Neville06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ijcnn/ijcnn2006.html#Neville06>
rdfs:seeAlso <https://doi.org/10.1109/IJCNN.2006.247213>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ijcnn>
dc:title A hardware implementation of Multi-level Threshold Logic for Artificial Neural Net. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document