A Simulation-Based Study of 2-level TLB and Cache Performance of the SPEC CPU2000 Benchmarks.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/imecs/SharifiSR07
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2007
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A Simulation-Based Study of 2-level TLB and Cache Performance of the SPEC CPU2000 Benchmarks.
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A Simulation-Based Study of 2-level TLB and Cache Performance of the SPEC CPU2000 Benchmarks.
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