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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ims/HuangRYT00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jose_Renau>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Josep_Torrellas>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_C._Huang_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seung-Moon_Yoo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-44570-6%5F11>
foaf:homepage <https://doi.org/10.1007/3-540-44570-6_11>
dc:identifier DBLP conf/ims/HuangRYT00 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-44570-6%5F11 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jose_Renau>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Josep_Torrellas>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_C._Huang_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seung-Moon_Yoo>
swrc:pages 152-159 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ims/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ims/HuangRYT00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ims/HuangRYT00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ims/ims2000.html#HuangRYT00>
rdfs:seeAlso <https://doi.org/10.1007/3-540-44570-6_11>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ims>
dc:title Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document