Vertical Channel Transistor (VCT) as Access Transistor for Future 4F2 DRAM Architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/imw2/FengJQZKKCSLYHZ23
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/imw2/FengJQZKKCSLYHZ23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Abraham_Yoo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chao_Lin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chao_Zhao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chen_Yang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Daohuan_Feng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Deyuan_Xiao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dh_Han
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Di_Ma
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Eric_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Guangsu_Shao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Harry_Kim
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Huiming_Li
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jaewoo_Kim
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jian_Chu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jianfeng_Xiao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jingheng_Meng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Shao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Linjiang_Xia
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Long_Hou
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mingde_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mingtang_Zhang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Minrui_Hu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Qinghua_Han
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Renrui_Huang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shuiping_Zhao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ted_Park
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tianming_Li
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Wenli_Zhao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiang_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiangbo_Kong
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiaoan_Yang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiaoping_Li
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xinwen_Jin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xuan_Pan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yan_Wang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yanzhe_Tang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yi_Jiang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yongjie_Li_0002
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuan_Cheng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yucheng_Liao
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuhong_Zheng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yunsong_Qiu
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FIMW56887.2023.10145977
>
foaf:
homepage
<
https://doi.org/10.1109/IMW56887.2023.10145977
>
dc:
identifier
DBLP conf/imw2/FengJQZKKCSLYHZ23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FIMW56887.2023.10145977
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
rdfs:
label
Vertical Channel Transistor (VCT) as Access Transistor for Future 4F2 DRAM Architecture.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Abraham_Yoo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chao_Lin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chao_Zhao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chen_Yang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Daohuan_Feng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Deyuan_Xiao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dh_Han
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Di_Ma
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Eric_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Guangsu_Shao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Harry_Kim
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Huiming_Li
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jaewoo_Kim
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jian_Chu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jianfeng_Xiao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jingheng_Meng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Shao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Linjiang_Xia
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Long_Hou
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mingde_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mingtang_Zhang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Minrui_Hu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Qinghua_Han
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Renrui_Huang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shuiping_Zhao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ted_Park
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tianming_Li
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Wenli_Zhao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiang_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiangbo_Kong
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiaoan_Yang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiaoping_Li
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xinwen_Jin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xuan_Pan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yan_Wang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yanzhe_Tang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yi_Jiang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yongjie_Li_0002
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuan_Cheng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yucheng_Liao
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuhong_Zheng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yunsong_Qiu
>
swrc:
pages
1-4
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/imw2/2023
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/imw2/FengJQZKKCSLYHZ23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/imw2/FengJQZKKCSLYHZ23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/imw2/imw2023.html#FengJQZKKCSLYHZ23
>
rdfs:
seeAlso
<
https://doi.org/10.1109/IMW56887.2023.10145977
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/imw2
>
dc:
title
Vertical Channel Transistor (VCT) as Access Transistor for Future 4F2 DRAM Architecture.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document