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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/intellec/PirzadaMHX019>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abid_Murtaza>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jianwei_Liu_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Noman_Hasan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Syed_Jahanzeb_Hussain_Pirzada>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tongge_Xu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FINTELLECT47034.2019.8954986>
foaf:homepage <https://doi.org/10.1109/INTELLECT47034.2019.8954986>
dc:identifier DBLP conf/intellec/PirzadaMHX019 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FINTELLECT47034.2019.8954986 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label The Parallel CMAC Synthetic Initialization Vector Algorithm Implementation on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abid_Murtaza>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jianwei_Liu_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Muhammad_Noman_Hasan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Syed_Jahanzeb_Hussain_Pirzada>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tongge_Xu>
swrc:pages 1-5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/intellec/2019>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/intellec/intellec2019.html#PirzadaMHX019>
rdfs:seeAlso <https://doi.org/10.1109/INTELLECT47034.2019.8954986>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/intellec>
dc:title The Parallel CMAC Synthetic Initialization Vector Algorithm Implementation on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document