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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ipps/AndrewsN03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Andrews_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Douglas_Niehaus>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIPDPS.2003.1213479>
foaf:homepage <https://doi.org/10.1109/IPDPS.2003.1213479>
dc:identifier DBLP conf/ipps/AndrewsN03 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIPDPS.2003.1213479 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label Architectural Frameworks for MPP Systems on a Chip. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Andrews_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Douglas_Niehaus>
swrc:pages 265 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ipps/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ipps/AndrewsN03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ipps/AndrewsN03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ipps/ipdps2003.html#AndrewsN03>
rdfs:seeAlso <https://doi.org/10.1109/IPDPS.2003.1213479>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ipps>
dc:subject reconfigurable architectures, FPGA, thread programming, computational frameworks, embedded systems (xsd:string)
dc:title Architectural Frameworks for MPP Systems on a Chip. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document