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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ipps/DeCRPB95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/John_A._Chandy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_De>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_Parkes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sumit_Roy_0003>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIPPS.1995.395889>
foaf:homepage <https://doi.org/10.1109/IPPS.1995.395889>
dc:identifier DBLP conf/ipps/DeCRPB95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIPPS.1995.395889 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Parallel algorithms for logic synthesis using the MIS approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/John_A._Chandy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_De>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prithviraj_Banerjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_Parkes>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sumit_Roy_0003>
swrc:pages 579-585 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ipps/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ipps/DeCRPB95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ipps/DeCRPB95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ipps/ipps1995.html#DeCRPB95>
rdfs:seeAlso <https://doi.org/10.1109/IPPS.1995.395889>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ipps>
dc:subject parallel algorithms; logic CAD; logic design; combinational circuits; logic synthesis; combinational logic synthesis; VLSI system design; ProperMIS; portable parallel algorithm; parallel algorithms; parallel architectures (xsd:string)
dc:title Parallel algorithms for logic synthesis using the MIS approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document