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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ipps/McBrayerW95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philip_A._Wilsey>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Timothy_J._McBrayer>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIPPS.1995.395890>
foaf:homepage <https://doi.org/10.1109/IPPS.1995.395890>
dc:identifier DBLP conf/ipps/McBrayerW95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIPPS.1995.395890 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Process combination to increase event granularity in parallel logic simulation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philip_A._Wilsey>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Timothy_J._McBrayer>
swrc:pages 572-578 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ipps/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ipps/McBrayerW95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ipps/McBrayerW95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ipps/ipps1995.html#McBrayerW95>
rdfs:seeAlso <https://doi.org/10.1109/IPPS.1995.395890>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ipps>
dc:subject logic circuits; circuit analysis computing; parallel processing; logic CAD; event granularity; parallel logic simulation; digital system design; logic circuits; symmetric multiprocessors; parallel logic simulators; logic simulation; VHDL description (xsd:string)
dc:title Process combination to increase event granularity in parallel logic simulation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document