A Memory Efficient Array Architecture for Real-Time Motion Estimation.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ipps/MoshnyagaT97
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1997
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A Memory Efficient Array Architecture for Real-Time Motion Estimation.
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motion estimation, array architecture, real-time motion estimation, video picture, video memory distribution, HDTV picture format, memory requirements, VLSI implementation, video-coding
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A Memory Efficient Array Architecture for Real-Time Motion Estimation.
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