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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/irps/0027AP20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Divya_Acharya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jian_Liu_0027>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nathaniel_Peachey>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIRPS45951.2020.9128336>
foaf:homepage <https://doi.org/10.1109/IRPS45951.2020.9128336>
dc:identifier DBLP conf/irps/0027AP20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIRPS45951.2020.9128336 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Triggering Optimization on NAND ESD Clamp and Its ESD Protection IO Scheme for CMOS Designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Divya_Acharya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jian_Liu_0027>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nathaniel_Peachey>
swrc:pages 1-6 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/irps/irps2020.html#0027AP20>
rdfs:seeAlso <https://doi.org/10.1109/IRPS45951.2020.9128336>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/irps>
dc:title Triggering Optimization on NAND ESD Clamp and Its ESD Protection IO Scheme for CMOS Designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document