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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/irps/KaralkarGPHG21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kyong_Jin_Hwang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Milova_Paul>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Gauthier_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sagar_Premnath_Karalkar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vishal_Ganesan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FIRPS46558.2021.9405206>
foaf:homepage <https://doi.org/10.1109/IRPS46558.2021.9405206>
dc:identifier DBLP conf/irps/KaralkarGPHG21 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FIRPS46558.2021.9405206 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kyong_Jin_Hwang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Milova_Paul>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Gauthier_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sagar_Premnath_Karalkar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vishal_Ganesan>
swrc:pages 1-5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/irps/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/irps/KaralkarGPHG21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/irps/KaralkarGPHG21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/irps/irps2021.html#KaralkarGPHG21>
rdfs:seeAlso <https://doi.org/10.1109/IRPS46558.2021.9405206>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/irps>
dc:title Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document