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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isca/ChengMRBC06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/John_B._Carter>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Karthik_Ramani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Liqun_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naveen_Muralimanohar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Balasubramonian>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCA.2006.23>
foaf:homepage <https://doi.org/10.1109/ISCA.2006.23>
dc:identifier DBLP conf/isca/ChengMRBC06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCA.2006.23 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Interconnect-Aware Coherence Protocols for Chip Multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/John_B._Carter>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Karthik_Ramani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Liqun_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naveen_Muralimanohar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Balasubramonian>
swrc:pages 339-351 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isca/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isca/ChengMRBC06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isca/ChengMRBC06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isca/isca2006.html#ChengMRBC06>
rdfs:seeAlso <https://doi.org/10.1109/ISCA.2006.23>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isca>
dc:title Interconnect-Aware Coherence Protocols for Chip Multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document