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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isca/FoutrisGVG13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonio_Gonz%E2%88%9A%C2%B0lez_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dimitris_Gizopoulos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nikos_Foutris>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xavier_Vera>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2485922.2485976>
foaf:homepage <https://doi.org/10.1145/2485922.2485976>
dc:identifier DBLP conf/isca/FoutrisGVG13 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2485922.2485976 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
rdfs:label Deconfigurable microprocessor architectures for silicon debug acceleration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonio_Gonz%E2%88%9A%C2%B0lez_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dimitris_Gizopoulos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nikos_Foutris>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xavier_Vera>
swrc:pages 631-642 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isca/2013>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isca/FoutrisGVG13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isca/FoutrisGVG13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isca/isca2013.html#FoutrisGVG13>
rdfs:seeAlso <https://doi.org/10.1145/2485922.2485976>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isca>
dc:title Deconfigurable microprocessor architectures for silicon debug acceleration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document