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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isca/LiMLH13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahmed_Hemani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jamshaid_Sarwar_Malik>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shaoteng_Liu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shuo_Li_0002>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2489068.2489072>
foaf:homepage <https://doi.org/10.1145/2489068.2489072>
dc:identifier DBLP conf/isca/LiMLH13 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2489068.2489072 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
rdfs:label A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahmed_Hemani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jamshaid_Sarwar_Malik>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shaoteng_Liu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shuo_Li_0002>
swrc:pages 25-32 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isca/2013mes>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isca/LiMLH13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isca/LiMLH13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isca/mes2013.html#LiMLH13>
rdfs:seeAlso <https://doi.org/10.1145/2489068.2489072>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isca>
dc:title A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document