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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isca/MuralimanoharB07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naveen_Muralimanohar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Balasubramonian>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1250662.1250708>
foaf:homepage <https://doi.org/10.1145/1250662.1250708>
dc:identifier DBLP conf/isca/MuralimanoharB07 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1250662.1250708 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Interconnect design considerations for large NUCA caches. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naveen_Muralimanohar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Balasubramonian>
swrc:pages 369-380 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isca/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isca/MuralimanoharB07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isca/MuralimanoharB07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isca/isca2007.html#MuralimanoharB07>
rdfs:seeAlso <https://doi.org/10.1145/1250662.1250708>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isca>
dc:subject cache models, interconnect, memory hierarchies, network-on-chip, non-uniform cache architecture (xsd:string)
dc:title Interconnect design considerations for large NUCA caches. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document