A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isca/SaidMME14
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/isca/SaidMME14
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Farhad_Mehdipour
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kazuaki_J._Murakami
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mohamed_El-Sayed_0011
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mostafa_Said
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F2768177.2768178
>
foaf:
homepage
<
https://doi.org/10.1145/2768177.2768178
>
dc:
identifier
DBLP conf/isca/SaidMME14
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F2768177.2768178
(xsd:string)
dcterms:
issued
2014
(xsd:gYear)
rdfs:
label
A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Farhad_Mehdipour
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kazuaki_J._Murakami
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mohamed_El-Sayed_0011
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mostafa_Said
>
swrc:
pages
9-16
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/isca/2015mes
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/isca/SaidMME14/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/isca/SaidMME14
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/isca/mes2015.html#SaidMME14
>
rdfs:
seeAlso
<
https://doi.org/10.1145/2768177.2768178
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/isca
>
dc:
title
A Design Methodology for Performance Maintenance of 3D Network-on-Chip with Multiplexed Through-Silicon Vias.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document