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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isca/YanLHL10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guihai_Yan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaowei_Li_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaoyao_Liang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yinhe_Han_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1815961.1816025>
foaf:homepage <https://doi.org/10.1145/1815961.1816025>
dc:identifier DBLP conf/isca/YanLHL10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1815961.1816025 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guihai_Yan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaowei_Li_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaoyao_Liang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yinhe_Han_0001>
swrc:pages 485-496 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isca/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isca/YanLHL10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isca/YanLHL10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isca/isca2010.html#YanLHL10>
rdfs:seeAlso <https://doi.org/10.1145/1815961.1816025>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isca>
dc:subject complimentary effects, delay sensor, pvt variations, thread migration, timing emergency (xsd:string)
dc:title Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document