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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/CelinG15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alberto_Celin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrea_Gerosa>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2015.7168918>
foaf:homepage <https://doi.org/10.1109/ISCAS.2015.7168918>
dc:identifier DBLP conf/iscas/CelinG15 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2015.7168918 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ő£őĒ ADCs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alberto_Celin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrea_Gerosa>
swrc:pages 1454-1457 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2015>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/CelinG15/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/CelinG15>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2015.html#CelinG15>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2015.7168918>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ő£őĒ ADCs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document