[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/ChenCWG06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jia-Wei_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jinn-Shyan_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiun-In_Guo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kuan-Hung_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2006.1692982>
foaf:homepage <https://doi.org/10.1109/ISCAS.2006.1692982>
dc:identifier DBLP conf/iscas/ChenCWG06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2006.1692982 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jia-Wei_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jinn-Shyan_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiun-In_Guo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kuan-Hung_Chen>
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/ChenCWG06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/ChenCWG06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#ChenCWG06>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2006.1692982>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document