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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/FanZH08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ge_Zhang_0007>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qifei_Fan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weiwu_Hu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2008.4542191>
foaf:homepage <https://doi.org/10.1109/ISCAS.2008.4542191>
dc:identifier DBLP conf/iscas/FanZH08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2008.4542191 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A synchronized variable frequency clock scheme in chip multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ge_Zhang_0007>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qifei_Fan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weiwu_Hu>
swrc:pages 3410-3413 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/FanZH08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/FanZH08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2008.html#FanZH08>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2008.4542191>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A synchronized variable frequency clock scheme in chip multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document