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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/HongCS04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Magesh_Sadasivam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sangjin_Hong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shu-Shin_Chin>
dc:identifier DBLP conf/iscas/HongCS04 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Magesh_Sadasivam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sangjin_Hong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shu-Shin_Chin>
swrc:pages 733-736 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/HongCS04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/HongCS04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2004-2.html#HongCS04>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document