A 28Gbps 4√ó4 switch with low jitter SerDes using area-saving RF model in 0.13¬Ķm CMOS technology.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iscas/HsuLYCLKLCWHH08
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A 28Gbps 4√ó4 switch with low jitter SerDes using area-saving RF model in 0.13¬Ķm CMOS technology.
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