A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/iscas/JapaYGMSCV20
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Aditya_Japa
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jun_Rim_Choi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Manoj_Kumar_Majumder
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Palagani_Yellappa
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ramesh_Vaddi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Subhendu_Kumar_Sahoo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Venkateswarlu_Gonuguntla
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FISCAS45731.2020.9180724
>
foaf:
homepage
<
https://doi.org/10.1109/ISCAS45731.2020.9180724
>
dc:
identifier
DBLP conf/iscas/JapaYGMSCV20
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FISCAS45731.2020.9180724
(xsd:string)
dcterms:
issued
2020
(xsd:gYear)
rdfs:
label
A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Aditya_Japa
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jun_Rim_Choi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Manoj_Kumar_Majumder
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Palagani_Yellappa
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ramesh_Vaddi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Subhendu_Kumar_Sahoo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Venkateswarlu_Gonuguntla
>
swrc:
pages
1-5
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2020
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/iscas/JapaYGMSCV20/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/iscas/JapaYGMSCV20
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/iscas/iscas2020.html#JapaYGMSCV20
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ISCAS45731.2020.9180724
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/iscas
>
dc:
title
A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document