Settling time of mesochronous clock re-timing circuits in the presence of timing jitter. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Naveen_Kadayinti>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2017.8050694>
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dc:title	Settling time of mesochronous clock re-timing circuits in the presence of timing jitter. (xsd:string)
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