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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/KaoL99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chi-Chou_Kao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yen-Tai_Lai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.1999.777928>
foaf:homepage <https://doi.org/10.1109/ISCAS.1999.777928>
dc:identifier DBLP conf/iscas/KaoL99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.1999.777928 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label A routability and performance driven technology mapping algorithm for LUT based FPGA designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chi-Chou_Kao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yen-Tai_Lai>
swrc:pages 474-477 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/KaoL99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/KaoL99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas1999-1.html#KaoL99>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.1999.777928>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A routability and performance driven technology mapping algorithm for LUT based FPGA designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document