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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/KimCB05a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hyun-Geun_Byun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tae-Hyoung_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Uk-Rae_Cho>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2005.1464970>
foaf:homepage <https://doi.org/10.1109/ISCAS.2005.1464970>
dc:identifier DBLP conf/iscas/KimCB05a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2005.1464970 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label A 1.2V multi Gb/s/pin memory interface circuits with high linearity and low mismatch. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hyun-Geun_Byun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tae-Hyoung_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Uk-Rae_Cho>
swrc:pages 1847-1850 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/KimCB05a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/KimCB05a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2005-2.html#KimCB05a>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2005.1464970>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A 1.2V multi Gb/s/pin memory interface circuits with high linearity and low mismatch. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document