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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/MoreauDB19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Bol>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ludovic_Moreau>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/R%E2%88%9A%C2%A9mi_Dekimpe>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2019.8702680>
foaf:homepage <https://doi.org/10.1109/ISCAS.2019.8702680>
dc:identifier DBLP conf/iscas/MoreauDB19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2019.8702680 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label A 0.4V 0.5fJ/cycle TSPC Flip-Flop in 65nm LP CMOS with Retention Mode Controlled by Clock-Gating Cells. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Bol>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ludovic_Moreau>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/R%E2%88%9A%C2%A9mi_Dekimpe>
swrc:pages 1-4 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2019>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/MoreauDB19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/MoreauDB19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2019.html#MoreauDB19>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2019.8702680>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A 0.4V 0.5fJ/cycle TSPC Flip-Flop in 65nm LP CMOS with Retention Mode Controlled by Clock-Gating Cells. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document