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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/QuinnR05a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arthur_H._M._van_Roermund>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Patrick_J._Quinn>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2005.1464999>
foaf:homepage <https://doi.org/10.1109/ISCAS.2005.1464999>
dc:identifier DBLP conf/iscas/QuinnR05a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2005.1464999 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Design and optimization of multi-bit front-end stage and scaled back-end stages of pipelined ADCs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arthur_H._M._van_Roermund>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Patrick_J._Quinn>
swrc:pages 1964-1967 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/QuinnR05a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/QuinnR05a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2005-3.html#QuinnR05a>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2005.1464999>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Design and optimization of multi-bit front-end stage and scaled back-end stages of pipelined ADCs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document