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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/RajaeiLSNH20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_T._Niemier>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ramin_Rajaei>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sayeef_S._Salahuddin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaobo_Sharon_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yen-Kai_Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS45731.2020.9180676>
foaf:homepage <https://doi.org/10.1109/ISCAS45731.2020.9180676>
dc:identifier DBLP conf/iscas/RajaeiLSNH20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS45731.2020.9180676 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_T._Niemier>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ramin_Rajaei>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sayeef_S._Salahuddin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaobo_Sharon_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yen-Kai_Lin>
swrc:pages 1-5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/RajaeiLSNH20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/RajaeiLSNH20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2020.html#RajaeiLSNH20>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS45731.2020.9180676>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document