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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/TajalliAKE04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abbas_Khodaverdi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Armin_Tajalli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Farzad_Sahandi_Esfanjani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seyed_Mojtaba_Atarodi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2004.1328127>
foaf:homepage <https://doi.org/10.1109/ISCAS.2004.1328127>
dc:identifier DBLP conf/iscas/TajalliAKE04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2004.1328127 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Design and optimization of a high PSRR CMOS bandgap voltage reference. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abbas_Khodaverdi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Armin_Tajalli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Farzad_Sahandi_Esfanjani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seyed_Mojtaba_Atarodi>
swrc:pages 45-48 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/TajalliAKE04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/TajalliAKE04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2004-1.html#TajalliAKE04>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2004.1328127>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Design and optimization of a high PSRR CMOS bandgap voltage reference. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document