An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/iscas/WangLPCH23
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An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.
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