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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscas/XiaIHK12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masanori_Hariyama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michitaka_Kameyama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shota_Ishihara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhengfan_Xia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2012.6271954>
foaf:homepage <https://doi.org/10.1109/ISCAS.2012.6271954>
dc:identifier DBLP conf/iscas/XiaIHK12 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2012.6271954 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label Dual-rail/single-rail hybrid logic design for high-performance asynchronous circuit. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masanori_Hariyama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michitaka_Kameyama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shota_Ishihara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhengfan_Xia>
swrc:pages 3017-3020 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/XiaIHK12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/XiaIHK12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2012.html#XiaIHK12>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2012.6271954>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title Dual-rail/single-rail hybrid logic design for high-performance asynchronous circuit. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document