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dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%E2%88%82rg_Henkel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiang_Xu_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Srimat_T._Chakradhar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wayne_H._Wolf>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISCAS.2005.1464953>
foaf:homepage <https://doi.org/10.1109/ISCAS.2005.1464953>
dc:identifier DBLP conf/iscas/XuWHC05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISCAS.2005.1464953 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label A methodology for design, modeling, and analysis of networks-on-chip. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%E2%88%82rg_Henkel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiang_Xu_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Srimat_T._Chakradhar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wayne_H._Wolf>
swrc:pages 1778-1781 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscas/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscas/XuWHC05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscas/XuWHC05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscas/iscas2005-2.html#XuWHC05>
rdfs:seeAlso <https://doi.org/10.1109/ISCAS.2005.1464953>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscas>
dc:title A methodology for design, modeling, and analysis of networks-on-chip. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document