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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iscis/ShiOG06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Gregg>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Emre_%E2%88%9A%C4%96zer_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yunhe_Shi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F11902140%5F28>
foaf:homepage <https://doi.org/10.1007/11902140_28>
dc:identifier DBLP conf/iscis/ShiOG06 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F11902140%5F28 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Gregg>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Emre_%E2%88%9A%C4%96zer_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yunhe_Shi>
swrc:pages 248-257 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iscis/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iscis/ShiOG06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iscis/ShiOG06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iscis/iscis2006.html#ShiOG06>
rdfs:seeAlso <https://doi.org/10.1007/11902140_28>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iscis>
dc:title Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document