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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isdcs/ChatterjeeRG020>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chandan_Giri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hafizur_Rahaman_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Subhajit_Chatterjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Surajit_Kumar_Roy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISDCS49393.2020.9263015>
foaf:homepage <https://doi.org/10.1109/ISDCS49393.2020.9263015>
dc:identifier DBLP conf/isdcs/ChatterjeeRG020 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISDCS49393.2020.9263015 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label An Efficient Test Scheduling to Co-optimize Test Time and Peak Power for 3D ICs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chandan_Giri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hafizur_Rahaman_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Subhajit_Chatterjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Surajit_Kumar_Roy>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isdcs/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isdcs/ChatterjeeRG020/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isdcs/ChatterjeeRG020>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isdcs/isdcs2020.html#ChatterjeeRG020>
rdfs:seeAlso <https://doi.org/10.1109/ISDCS49393.2020.9263015>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isdcs>
dc:title An Efficient Test Scheduling to Co-optimize Test Time and Peak Power for 3D ICs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document