A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isicir/RuanTNW14
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/isicir/RuanTNW14
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Aiwu_Ruan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bo_Ni
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ke_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Wei_Tian
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FISICIR.2014.7029438
>
foaf:
homepage
<
https://doi.org/10.1109/ISICIR.2014.7029438
>
dc:
identifier
DBLP conf/isicir/RuanTNW14
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FISICIR.2014.7029438
(xsd:string)
dcterms:
issued
2014
(xsd:gYear)
rdfs:
label
A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Aiwu_Ruan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bo_Ni
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ke_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Wei_Tian
>
swrc:
pages
111-114
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/isicir/2014
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/isicir/RuanTNW14/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/isicir/RuanTNW14
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/isicir/isic2014.html#RuanTNW14
>
rdfs:
seeAlso
<
https://doi.org/10.1109/ISICIR.2014.7029438
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/isicir
>
dc:
title
A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document