Investigating heterogeneous combination of functional units for a criticality-based low-power processor architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/isict/ChiyonobuS04
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Investigating heterogeneous combination of functional units for a criticality-based low-power processor architecture.
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Investigating heterogeneous combination of functional units for a criticality-based low-power processor architecture.
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