A low-power crossroad switch architecture and its core placement for network-on-chip.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/ChangSC05
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2005
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A low-power crossroad switch architecture and its core placement for network-on-chip.
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NoC design, application-specific, low-power, networks on chip, systems on chips
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A low-power crossroad switch architecture and its core placement for network-on-chip.
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