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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/islped/ChenH05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiuting_Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xinhua_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1077603.1077620>
foaf:homepage <https://doi.org/10.1145/1077603.1077620>
dc:identifier DBLP conf/islped/ChenH05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1077603.1077620 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13¬Ķm CMOS. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiuting_Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xinhua_Chen>
swrc:pages 66-71 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/islped/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/islped/ChenH05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/islped/ChenH05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/islped/islped2005.html#ChenH05>
rdfs:seeAlso <https://doi.org/10.1145/1077603.1077620>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/islped>
dc:subject CMOS, WCDMA, frequency synthesizer, low power, phase-locked loop (xsd:string)
dc:title A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13¬Ķm CMOS. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document