A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assist.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/islped/ChiuHTZJC13
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A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assist.
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